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| INF8577N LCD CONTROL IC WITH I2C INTERFACE Description Functions: * Direct and duplex LCD control modes. IC controls 32 LCD segments in direct mode and 64 segments in duplex mode; * Ensures interface of I2C bus interface; can be used as expander of I2C bus output Features: * Supply voltage 2.5 to 6V; * Low power consumption; * Embedded oscillator for LCD control signals shaping; * Autoincremented data input; * Possibility to switch over display memory banks in direct control mode; * Possibility for cascading IC to increase number of controlled segment up to 256; * Blanking of display on supply reset. S32 P1 0 S31 S30 S29 S28 S27 S26 S25 S24 S23 S22 S21 S20 S19 S18 S17 S16 S15 S14 S13 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 SDA SCL Vs A0/OS A1 VDD A2/BP BP1 S1 S2 S3 S4 S5 S6 S7 S8 S9 S10 S11 S12 40 T amb= -10 to +70 Figure 1 - Package type Figure 2 - Pinout Operation temperature range Operation temperature range from minus 40 to plus 85 . 1 INF8577N Table 1 - Absolute maximum and maximum conditions Parameter, unit Symbol Maximum ratings min 2.5 0 -20 0 VDD-0.5 0 0.7 VDD 0 VDD0.10 0 0.7 VDD max 6.0 VDD 20 0.125 2.0 0.05 VDD 0.3 VDD VDD 0.10 VDD 0.3 VDD 6.0 100 -50 -20 -25 50 20 25 Absolute maximum ratings min max -0.5 8.0 -0.5 VDD+0.5 Supply voltage, V Input voltage, V Constant component of LCD driver, mV Consumption current, mA Input current, mA Output current, mA Reset forming voltage when switching on the supply, V Low input voltage on output A0/OSC, V High input voltage on output A0/OSC, V Low input voltage on output A1, V High input voltage on output A1, V Low input voltage on output A2/BP2, V High input voltage on output A2/BP2, V Low input voltage on outputs SCL, SDA, V High input voltage on outputs SCL, SDA, V Clock signal frequency, kHz VDD V1 VBP IDD,ISS II IO VPOR VIL1 VIH1 VIL2 VIH2 VIL3 VIH3 VIL4 VIH4 fSCL 2 INF8577N Table 2 - Electrical parameters (mb = from minus 40 to plus 85 ) Parameter n current Symbol IDD1 Test conditions 6.0 V, fSCL=100 kHz, ROSC=1 MOhm, OSC=680 pF VDD= 2.5 to 6.0 V, fSCL=0 kHz, ROSC=1 MOhm, OSC=680 pF VDD=5 V, fSCL=0 kHz, (direct control mode) A0/OSC=VDD , at mb =25 VDD=5 V, fSCL=0 kHz, ROSC=1 MOhm, OSC=680 pF at mb =25 VDD=5 V, IOL=3.0 mA VDD= 2.5 to 6.0 V, VSS =0V, VI=VDD or VSS VDD=2.5 to 6.0 V, VSS =0V VI=VDD or VSS VDD= 2.5 to 6.0 V, VI=VDD VDD= 2.5 to 6.0 V, VI=VDD VDD= 2.5 to 6.0 V, VSS =0V VI=VSS VDD=5 V, IOL1=0.3 mA VDD=5 V, IOH1=-0.3 mA V DD=5 V, VSS =0V VO=VSS+0.5V or VDD-0.5V or (VSS+VDD)/2+0.5V VDD=5 V, IOL2=100 VDD=5 V, IOH2=-100 mkA VDD=5 V, IOL3=100 mkA ROSC=1 MOhm, OSC=680 pF Value min max 125 Unit uA IDD2 IDD3 IDD4 Low output voltage tput SDA Leakage current on input - on outputs A1, SCL, SDA Leakage current on input A2/BP2,BP1 Input current - on output A2/BP2 Leakage current on input - on output A0/OSC Oscillator initial current Low output voltage - on outputs S1-S32 High output voltage - on outputs S1-S32 Output current on outputs of LCD lines control - on outputs 1,A2/2 Low output voltage - on outputs BP1, A2/BP2 High output voltage - on outputs BP1, A2/BP2 Mean level output voltage - on outputs BP1, A2/BP2 Frequency of signals on LCD control outputs VOL IL1 IL2 IPD IL3 IOSC -1 -5 -1 - 75 20 40 0.4 1 uA 5 5 1 5 uA uA uA V uA VOL1 VOH1 Iload VDD0.8 -100 0.8 100 V V uA V 4.5 1.75 65 0.5 V V 3.3 120 Hz VOL2 VOH2 VOL3 fLCD 3 INF8577N Time diagrams Sx tBS VDD=5V 0.5V 0.5V BP1,BP2 0.5V 0.5V tBS100 mks Figure 3 - Time diagram of LCD driver operation SDA tBU tL tf SCL tHD;ST tHD;DA tr tHI tSU;DA SD tSU; tSU; tBUF4.7us, tLOW4.7us, tHIGH4.0us, tr1.0 mks, tf0.3us, tHD;DAT0ns, tSU;DAT250ns, tSU;STA4.0mks, tSU;STO4.0mks tHD;STA4.0us, Figure 4 - Time diagram of I2C bus operation 4 INF8577N Application circuits LCD WITH DIRECT CONTROL 1 32 64 LINE 256 S 2 S B BP A S BP1 S S BP S 2 1 A B VD A O S A 0 OS BP2 V V A A O V A A 0 A 2 V SCL SDA V SC SD S S V SC S S S V SC L S S S 3 A2A1A0=000 A2A1A0=001 A2A1A0=111 Eight ICs INF8577N control 256 driver segments. Figure 5 - LCD driver with direct control 5 INF8577N DUPLEX LCD 1 32 64 BP 2 128 S S B B A S BP S S S B A BP V A O A OS C S S A BP2 V COSC RO V A A O V A A V SCL SD V SC S S S V S S S S V S S A1A0=00 A1A0=01 A1A0=11 Eight ICs INF8577N control 2 128 driver segments. Figure 6 - LCD driver with duplex control 6 INF8577N INF8577N 32-bit output bus 12 ----------------------- 31 32 S S1 BP BP2 A2 VD VDD A A OS VS SCL SDA VS SCL SDA S S3 2 expansion A2A1A0 =000 Output BP1 is always connected to VSS, output A0/OSC should be connected to VDD, or VSS. FIGURE 7 - USING IC INF8577CN AS 32-bit expander of I2C bus 7 INF8577N Table 3 - Pins description Pin No. 01 02 03 04 05 06 07 08 09 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 Symbol S32 S31 S30 S29 S28 S27 S26 S25 S24 S23 S22 S21 S20 S19 S18 S17 S16 S15 S14 S13 S12 S11 S10 S9 S8 S7 S6 S5 S4 S3 S2 S1 BP1 A2/BP2 VDD A1 A0/OSC VSS SCL SDA Output of LCD segment control Output of LCD segment control Output of LCD segment control Output of LCD segment control Output of LCD segment control Output of LCD segment control Output of LCD segment control Output of LCD segment control Output of LCD segment control Output of LCD segment control Output of LCD segment control Output of LCD segment control Output of LCD segment control Output of LCD segment control Output of LCD segment control Output of LCD segment control Output of LCD segment control Output of LCD segment control Output of LCD segment control Output of LCD segment control Output of LCD segment control Output of LCD segment control Output of LCD segment control Output of LCD segment control Output of LCD segment control Output of LCD segment control Output of LCD segment control Output of LCD segment control Output of LCD segment control Output of LCD segment control Output of LCD segment control Output of LCD segment control Synchronization input when cascading / line control output Input of hardware address line and synchronization when cascading / line control output Supply output from voltage source Input of hardware address line Input of hardware address line / oscillator input Common output Input of I C bus clock signal line Input / output of I C bus data line 2 2 Description 8 INF8577N N SUFFIX PLASTIK DIP (MS-011AC) D 40 21 E1 1 20 b2 A E C A1 e 0,25 (0,010) M C b L c Dimensions D, E1 don't include fin size which should not exceed 0,25 (0,010) per side. D E1 A b b2 e L E c A1 Millimeters min max min 50,30 12,32 53,20 1,980 14,73 0,485 6,35 0,36 0,56 0,014 0,77 1,77 Inches 0,030 0 0,115 0,600 0,008 0,015 2,54 0 10 2,92 5,08 15,24 15,87 0,20 0,38 0,39 max 2,094 0,580 0,250 0,022 0,070 0,100 10 0,200 0,625 0,015 Figure 8 - Overall dimensions of 2123.40- package. 9 |
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